![]() Fix issues with overall minItems/maxItems limits Patches adding compatibles for these, but I cannot test A33 or A83T. Like the driver commit description says, this driver could supportĪdditional SoCs: at least A33, A83T, and H3. To some DRAM controller registers as well. Separate IP block, the MBUS hardware has the ability to double-bufferĬertain DRAM controller registers, and the hardware MDFS process writes I am not quite sure the best way to handle DRAM register range in theĭT binding - as a separate reg property, a separate node, or simplyĮnlarging the MBUS register range. The MBUS nodes alreadyĮxisted, but were not bound to any driver before they were only usedįor their dma-ranges property. ![]() The binding and DTs are updated in patches 1-5. Some Allwinner SoCs, and enables it for the A64 and H5. This series adds a new devfreq driver for the MBUS/DRAM controller in To: MyungJoo Ham, Kyungmin Park, Chanwoo Choi, Maxime Ripard,Ĭhen-Yu Tsai, Jernej Skrabec, Rob HerringĬc: devicetree, linux-arm-kernel, linux-pm, linux-sunxi, ` (5 more replies) 0 siblings, 6 replies 14+ messages in threadįrom: Samuel Holland 3:18 UTC ( / raw) 3:18 ` dt-bindings: clock: sunxi: Export CLK_DRAM for devfreq Samuel Holland DRAM devfreq support for Allwinner A64/H5 archive mirror help / color / mirror / Atom feed * DRAM devfreq support for Allwinner A64/H5 3:18 Samuel Holland ![]()
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